A wide range fast settling frequency synthesizer is one of the core blocks in a radio frequency integrated circuit (RFIC). A closed loop based architecture such as a delay locked loop (DLL) based block extends the frequency range of a primary synthesizer while providing the functionality of a quadrature generator. The input signal that is provided to the DLL based frequency multiplier is received from either a direct digital synthesizer (DDS) or a conventional phase lock loop (PLL) based primary synthesizer. The input signal to the frequency multiplier is a programmable frequency signal that can be constantly changing. As this signal with constantly changing frequency is provided to the DLL based frequency multiplier, the internal delay locked loop (DLL) in the DLL based frequency multiplier is forced to lock each time to the changed input signal. In scenarios such as fast spectral sensing or direct digital modulation, the input signal can vary rapidly over a wide frequency range. In such scenarios, for every change in the input signal, the time taken by the internal DLL to settle down becomes significantly longer. This long settling time of the internal DLL limits the performance of the DLL based frequency multiplier when used in applications like fast spectral sensing or direct digital modulation. The longer settling time of the internal DLL can also distort an in-phase (I) and a quadrature phase (Q) components of an output signal.
Thus, there is a need for a solution that reduces the settling time of the internal DLL to enable fast switching of the DLL based frequency multiplier over a wide frequency range.
In FIGS. 2-7, the bold lines show digital information, the regular lines show analog signals, and the dashed lines show signals that may be either digital or analog. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.
The method components have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.